A typical computer system includes at least a microprocessor and some form of memory. The microprocessor has, among other components, arithmetic, logic, and control circuitry that interpret and execute instructions necessary for the operation and use of the computer system. FIG. 1 shows a typical computer system (10) having a microprocessor (12), memory (14), integrated circuits (16) that have various functionalities, and communication paths (18), i.e., buses and signals, that are necessary for the transfer of data among the aforementioned components of the computer system (10).
The operation of a computer system, such as the one shown in FIG. 1, requires the presence of signals to transmit information from one point in the computer system to another point in the computer system. Such signals are used to facilitate the transmission of various data. For example, a clock signal is used to transmit a reference of time to various components within a computer system. In another example, a data signal is used to transmit actual data to particular components within a computer system. In sum, the use of signals is imperative to the operation of a computer system in that without the presence of signals, computer system components would be unable to communicate with one another, effectively making the computer system unusable.
In some cases, it is desirable to be able to selectively control the passage of a signal from one point to another. One approach designers have used to achieve this end involves the use of transmission gates. When the transmission gate is enabled via a control signal, i.e., when the transmission gate is xe2x80x98on,xe2x80x99 the transmission gate provides a low impedance path between a node residing at an input of the transmission gate and a node residing at an output of the transmission gate. When the transmission gate is disabled via the control signal, i.e., when the transmission gate is xe2x80x98off,xe2x80x99 the transmission gate provides a high impedance path between the node at the input of the transmission gate and the node at the output of the transmission gate.
A transmission gate may be viewed as a switch that selectively controls the connection between two points. When enabled, the transmission gate allows the passage of a signal from one node to another, and alternatively, when disabled, the transmission gate blocks the passage of the signal from one node to the other.
To illustrate the design and use of a transmission gate, FIG. 2 shows a typical transmission gate (20). The transmission gate (20) is made up of an NMOS transistor (22) and a PMOS transistor (24), where the source and drain terminals of the NMOS transistor (22) are respectively connected to the source and drain terminals of the PMOS transistor (24). A first node (21) residing at an input of the transmission gate (20) is connected to one set of the connected terminals between the NMOS transistor (22) and the PMOS transistor (24), and a second node (23) residing at an output of the transmission gate (20) is connected to the other set of connected terminals between the NMOS transistor (22) and the PMOS transistor (24). Moreover, a control signal (shown in FIG. 2 as CONTROL) is connected to the gate terminal of the NMOS transistor (22), and a complement of the control signal (shown in FIG. 2 as CONTROLxe2x80x2) is connected to the gate terminal of the PMOS transistor (24). Further, a capacitor (26) positioned between the second node (23) and ground (28) is shown as capacitors are often used in circuit design to decouple noise, i.e., remove adverse power variation effects, from a node.
When the control signal goes/is high, the transmission gate (20) switches/is xe2x80x98onxe2x80x99 as the NMOS transistor (22) and the PMOS transistor (24) switch xe2x80x98on.xe2x80x99 In this case, the xe2x80x98onxe2x80x99 states of the NMOS and PMOS transistors (22, 24) provide a low impedance path between the first node (21) and the second node (23), thus enabling a signal from the first node (21) to pass to the second node (23). Alternatively, when the control signal goes/is low, the transmission gate (20) switches/is xe2x80x98offxe2x80x99 as the NMOS transistor (22) and the PMOS transistor (24) switch xe2x80x98off.xe2x80x99 In this case, the xe2x80x98offxe2x80x99 states of the NMOS and PMOS transistors (22, 24) provide a high impedance path between the first node (21) and the second node (23), thus blocking a signal from passing from the first node (21) to the second node (23). Therefore, by selectively enabling and disabling a transmission gate, the passage of a signal from one point in a circuit to another may be controlled.
Ideally, when the transmission gate (20) is xe2x80x98off,xe2x80x99 there should be high impedance between the first node (21) and the second node (23) irrespective of the signals on the first and second nodes (21, 23). The presence of capacitive or inductive coupling noise on the signals on the first and second nodes (21, 23) may disrupt the functionality of the transmission gate (20). In other words, it is undesirable for there to be a conduction path between the first and second nodes (21, 23) when the transmission gate (20) is supposed to be xe2x80x98off.xe2x80x99
A situation where such an undesirable conduction path forms is when the voltage at the first node (21) swings below the low voltage threshold of the NMOS transistor (22) due to, for example, ground bounce or coupling noise. In this case, the NMOS transistor (22) switches xe2x80x98onxe2x80x99 for some finite amount of time causing charge to leak away from the second node (23) (as indicated by the arrow in FIG. 2). If the second node (23) is a sensitive node, i.e., a node that is required to have some precise value, the leaking of charge from the second node (23) to the first node (21) may lead to inaccuracies or performance degradation. More so, for sustained noise on the first node (21) below the critical voltage that switches xe2x80x98onxe2x80x99 the NMOS transistor (22), the charge of the capacitor (26) connected to the second node (23) may fall low enough to destroy the state of the second node (23) altogether. This may lead to functional failures.
Thus, there is a need for a transmission gate design that prevents noise on a node connected to the transmission gate from affecting the state of another node connected to the transmission gate.
According to one aspect of the present invention, an integrated circuit that has a transmission gate that selectively controls passage of a signal from a first node to a second node comprises a first stage that provides a low impedance path between the first node and the second node when the transmission gate is enabled, where the first stage comprises a current sourcing device that delivers charge to the first node when the transmission gate is disabled and a voltage of the first node goes below a first critical voltage.
According to another aspect, an integrated circuit that has a transmission gate that selectively controls passage of a signal from a first node to a second node comprises a first pass means for providing a low impedance path between the first node and the second when the transmission gate is enabled, where the first pass means comprises charge delivering means for delivering charge to the first node when the transmission gate is disabled and a voltage of the first node goes below a first critical voltage.
According to another aspect, a method for performing circuit operations using a transmission gate that selectively controls passage of a signal from a first node to a second node comprises facilitating the passage of the signal from the first node to the second node when the transmission gate is enabled by a control signal; and sourcing current to the first node when the transmission gate is disabled by the control signal and a voltage of the input node goes below a first critical voltage.
Other aspects and advantages of the invention will be apparent from the following description and the appended claims.